Lasers and molten tin: Inside Intel’s plans for the world’s most advanced chip-making process

After years of manufacturing struggles, Intel has gone all in on extreme ultraviolet lithography to make its most advanced chips. The technology is theoretically precise enough to hit your thumb with a laser pointer from the moon.

Intel workers in lab

Intel uses extreme ultraviolet lithography to print transistors and other complex features in some of the most advanced processors in the world.

Photo: Walden Kirsch/Intel Corporation

HILLSBORO, Ore. — To create a beam of ultraviolet radiation precise enough to print the world’s most advanced microchips, one of the most expensive tools in the world sprays microscopic droplets of molten tin across a vacuum chamber. It then shoots those droplets with a 25 kilowatt laser beam: twice.

The first shot, at low energy, evaporates the droplet into a tiny cloud shaped like a pancake. The second full-power shot transforms the cloud into plasma that’s focused down to a beam. The machine bounces the beam off a series of mirrors, and finally points it at a silicon wafer, where it draws the billions of transistors and other features that form the chips that power the world.

This system is called extreme ultraviolet (EUV) lithography, and it’s theoretically precise enough to hit your thumb with a laser pointer from the moon.

EUV machines are the future of the semiconductor industry, which is operating at a breakneck pace after the pandemic upended the world. Jolted by factory shutdowns and a big shift in demand for consumer goods that all seem to need chips, the businesses that manufacture semiconductors have been furiously growing to satiate the world’s unlimited appetite for computing power. At the same time, Intel has vowed to return its chip-making business to its former leadership position after a prolonged period of dysfunction.

The Ronler Acres facility Intel operates in the Portland suburb of Hillsboro, Oregon, itself is under construction, as part of a massive expansion at the company’s most important manufacturing site. In part, the expanded factory will house the huge machines manufactured by the Dutch company ASML that are required to use EUV technology for chip making.

The Ronler complex has long been where Intel conducts its most advanced research operations, and it is typically where the company finalizes its latest microprocessor designs before they are mass-produced at facilities, known as fabs. After years of manufacturing challenges, CEO Pat Gelsinger has said the company is now all-in on the EUV technology needed to make advanced processors, and designated Oregon as the place to do it.

“As I like to say, it's easier to be No. 2 in the bike race than it is to be No. 1,” Gelsinger said at an Intel event over the summer. “And you're able to just catch up much more quickly by exerting less energy, and we're really leaning on the learnings that we have from ASML and the deepening relationship that we have with them."

Tools of the trade

The EUV tools are exclusively manufactured in the Netherlands by ASML, and arrive at Intel’s chip fabrication facility in the suburbs of Portland in thousands of pieces. Each $180 million machine is roughly 12 feet tall, and weighs about 180 metric tons. The vacuum chamber alone is too big and heavy to fit onto a single airplane — even a 747 can’t manage the load — and it arrives in three pieces, according to Mark Phillips, Intel’s director of Lithography Hardware and Solutions.

On a recent visit by Protocol to Intel’s Ronler Acres complex, Phillips talked about EUV tech and Intel’s factory and tools with apparent pride, boasting with an engineer’s bravado about the prowess necessary to achieve what the company has inside the fab.

“The more I know about what these tools do, the more it just blows me away that we're able to do [this],” he said.

The fab on its Ronler Acres campus itself is a marvel in automation. Containers called FOUPS — front-opening unified pods, which hold multiple silicon wafers that individual chips are printed on — whiz around on robotic tracks attached to the ceiling. A typical wafer requires roughly 1,000 process steps and will travel more than 100 miles inside the factory during the weeks-long manufacturing process.

Striding through Intel’s sprawling factory, bathed in yellow light, Phillips explained the design decisions that went into the building. The ceilings were built high enough to accommodate a future generation of the tools called high-numerical aperture EUV, or high NA, based on the size of the optics necessary. The yellow factory lighting is intentional, designed to not interfere with the light-sensitive photoresist material used to form patterns on the silicon. (Intel does not allow photography inside its most advanced facilities.)

There are no pillars or support columns inside the plant, which leaves more space for the engineers to work around the tools. Custom-made cranes capable of lifting 10 tons each are built into the ceiling. Intel needs those cranes to move the tools into place, and open the machines up if one needs work or an upgrade. One of the ASML systems Phillips stopped by to demonstrate was undergoing an upgrade, exposing a complex system of hoses, wires and chambers.

“Each [crane] beam can lift 10,000 kilograms, and for some of the lifts you have to bring two of the crane beams over to lift the components in the tool,” Phillips said. “That’s needed to both install them and maintain them; if something deep inside really breaks, you’ll have to lift up the top module, set it on a stand out behind or in front of the tool, then the ASML field-service engineers can get to work.”

Below the EUV tools, Intel built a lower level that contains the transformers, power conditioners, racks of vacuum pumps for hydrogen-abatement equipment systems and racks of power supplies that run the CO2 driver laser. The driver laser shoots the microscopic pieces of tin inside the tool at a rate of 50,000 times a second. Originally made by a laser company called Trumpf for metal cutting, the EUV version combines four of its most powerful designs into a single unit for EUV use, Phillips said.

“It’s incredibly difficult to make 13.5 nanometer photons with enough power to make it all the way through the optics and expose the [photo]resist,” or the light-sensitive material used in chip manufacturing, Phillips said. “The source alone delayed its readiness for the whole industry by several years.”

Intel techsIntel techs work inside its fab in Hillsboro, Oregon. Photo: Walden Kirsch/Intel Corporation

EUV technology has been in development for more than 30 years, nearly as long as Phillips has worked at Intel. Once called soft X-ray, development began in the mid-1980s, but only very recently has that work resulted in technology that’s useful for high-volume chip manufacturing.

Part of the difficulty in bringing the technology to market was ensuring it was mature enough to perform well at the high level of reliability chip manufacturers have come to expect. ASML’s Michael Lercel, a senior director of Strategic Marketing, said the company builds the equipment to run over 90% of the time, and is only just now starting to get the EUV tools to that point. It took time for its engineers to figure out how to reach a point where the cost-effectiveness of the machines made sense for customers to bring into high-volume production.

“We just kept an eye on when it's finally, really, really, really, actually, ready,” Intel's co-general manager of Logic Technology Development Sanjay Natarajan told Protocol. “And then we went for it.”

Pulling together EUV tech was a collaborative effort among would-be rivals. Because chip manufacturing is so complex and requires tools, robotics and software made by hundreds of companies, the entire industry tends to line up behind whatever process manufacturing technology is believed by scientists and engineers to be the next new thing.

“The technology is becoming so complex, nobody can do it alone,” said Luc Van den hove, CEO of research and development hub Imec. “And when you make certain choices for a particular technology option, you have to align the entire ecosystem and you have to align suppliers smartly.”

The bumpy ride to EUV

Intel’s journey to EUV technology has not been a smooth one. Prior to its adoption by TSMC, Samsung and Intel, EUV’s evolution was something of an ongoing inside joke among engineers, always on the cusp of being ready for modern chip production but never quite there.

Progress in semiconductor manufacturing is a function of size, as companies spend billions of dollars researching and developing different methods of shrinking a chip’s features and squeezing more transistors onto each piece of silicon. Adding more components onto each chip requires precise, expensive and complex tools and processes to print the tiny, atomic-level features.

Even before Intel attempted to introduce EUV technology into the mix, the company ran into problems with its so-called 10-nanometer process, which it is using to make the most advanced chips you’ll find for sale in PCs today. It has also struggled with the transition to the next-generation tech, which it now calls Intel 4, announcing a further six-month delay over the summer in 2020 that helped open the door for Apple’s game-changing M1 chips, built by TSMC. (A word about manufacturing-process naming conventions: The nanometer number associated with each one used to refer to specific features, but that no longer applies. Today, it’s just marketing terminology.)

An extreme ultraviolet lithography machineAn extreme ultraviolet lithography machine made by the Dutch company ASML.Photo: Intel Corporation

Yet despite the chip giant’s manufacturing struggles, it still maintains nearly 90% market share in data-center chips, compared with AMD’s 10%, according to data from Mercury Research. Intel has lost more ground in desktop and laptop computers, holding onto 83% market share and 78% share respectively, with the remainder going mostly to AMD, according to Mercury data.

After years of hearing about these problems, Wall Street had largely written off the company’s manufacturing prowess. Investors expected the company to move to a hybrid approach to chip making, contracting more of its chip manufacturing to TSMC and potentially to Samsung. Some analysts suggested the company go as far as spinning out the manufacturing business, as AMD did with what is now known as GlobalFoundries years ago.

But weeks after Gelsinger took over, he announced that the company planned to double down on its manufacturing business in an effort to return Intel to its roots, including a bid to compete with TSMC as a contract manufacturer. Since his return to Intel after nearly nine years as chief executive of VMware, he has shaken up the company’s executive team. That includes re-hiring several notable Intel staffers, including Natarajan.

This is the way

Masked and seated in a conference room adjacent to one of the sprawling atriums in an office building at the Ronler site, Natarajan talked about the company’s plans for rolling out chips made with EUV tech, occasionally standing to illustrate a concept on one of the whiteboards.

The way Natarajan tells it, Intel’s stumbles were tied to the fact that when the company was ready to move to its 10 nm technology, EUV wasn’t ready.

Defects start to occur more frequently at smaller, atomic-sized technologies in part because of all the techniques necessary to make pre-EUV lithography print smaller and smaller features. The larger-size, pre-EUV beam is too big to easily print transistors and features on the most complex chips. The process requires more manufacturing stages and techniques — tricks, really — to make up for the larger drawing tool, which pushes the boundaries of modern physics.

“Defects start cropping up, your flow gets unworkably long so that it takes months longer for a wafer to get out of the fab. It just [makes] manufacturing challenges left and right,” he said.

Midway through the development of its next-generation Intel 4 manufacturing technology, the company’s engineers determined that EUV had moved to a point where it could be used for production, and Intel “pivoted fairly quickly to redefine that technology node to use quite a bit of EUV to greatly simplify the flow,” Natarajan said. Roughly 30 steps turned into about three, which reduced the number of defects, which the company had said previously was a problem at the beginning of the process.

EUV tech will continue to be on the forefront of chip manufacturing for at least 10 years, according to Natarajan. The wavelength is more precise, and manufacturers haven’t yet needed to roll out most of the tricks they used with older lithography technology.

The first EUV chips that Intel will sell are set to arrive in 2023, and include the Meteor Lake PC processors and Granite Rapids server chips, Natarajan said. Meteor Lake is taped-in, an industry term for the final phase in the design process before it’s made at large scale.

Before Intel can begin high-volume manufacturing, Natarajan said the company’s engineers will optimize the production process to get the desired yield, which means there are a sufficient number of working chips without defects on each 300 millimeter-wide wafer. The company also wants to make sure the chips that come out of the process are reliable and operate properly when installed in computers and data centers.

“Ultimately, we get to a point where we say the process is reliable and things we make on it are going to pass and be healthy in the field,” Natarajan said. “Then it's [the] ongoing work to make the transistors go faster.”


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